Dynamically Configurable Systolic-like Architecture for Close to Optimal Soft MIMO Detection
نویسنده
چکیده
A novel configurable processor architecture is presented for detecting Spatially Multiplexed (SM) data in a high order (4x4) multiple-input-multiple-output (MIMO) wireless systems. It is a customized architecture to match an algorithm that provides “soft” values to the Forward Error Decoder (FEC), with systolic-like data and control flow. The processor is able to switch between three different modulation schemes (QPSK, 16-QAM, and 64-QAM) without any configuration latency. Preliminary synthesis results indicate that each detector core uses only about 18 Kilo Gate Equivalent (KGE) in addition to around 1800 storage flip-flops. Multiple detector cores can be stacked to achieve very high throughput in a multi-carrier MIMO system. Moreover, owing to the careful choice of the underlying algorithm the Packet Error Rate (PER) is close to optimal. The processor is very well suited for baseband processing at wireless base-stations and mobile handsets alike.
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